No. 1 (2001)
Published:
2001-03-30
ARTICLES FROM THIS ISSUE
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SiGe field effect transistors
Abstract
Recent and encouraging developments in Schot- tky and MOS gated Si/SiGe field effect transistors are sur- veyed. Circuit applications are now beginning to be investi- gated. The authors discuss some of this work and consider future prospects for the role of SiGe field effect devices in mobile communications.
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Reliability of deep submicron MOSFETs
Abstract
In this work, a review of the reliability of n- and p-channel Si and SOI MOSFETs as a function of gate length and temperature is given. The main hot carrier effects and degradations are compared for bulk and SOI devices in a wide range of gate length, down to deep submicron. The worst case aging, device lifetime and maximum drain bias that can be applied are addressed. The physical mechanisms and the emergence of new phenomena at the origin of the degradation are studied for advanced MOS transistors. The impact of the substrate bias is also outlined.
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High-temperature instability processes in SOI structures and MOSFETs
Abstract
The paper reviews the problems related to BOX high-temperature instability in SOI structures and MOSFETs. The methods of bias-temperature research applied to SOI structures and SOI MOSFETs are analysed and the results of combined electrical studies of ZMR, and SIMOX SOI struc- tures are presented. The studies are focused mainly on elec- trical discharging processes in the BOX at high temperature and its link with new instability phenomena such as high- temperature kink effects in SOI MOSFETs.
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Challenges in ultrathin oxide layers formation
Abstract
In near future silicon technology cannot do without ultrathin oxides, as it becomes clear from the Roadmap 2000. Formation, however, of such layers creates a lot of technical and technological problems. The aim of this paper is to present the technological methods that potentially can be used for formation of ultrathin oxide layers for next generations ICs. The methods are brie y described and their pros and cons are discussed.
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Piezoresistive sensors for atomic force microscopy
Abstract
An important element in microelectronics is the comparison of the modelling and measurements results of the real semiconductor devices. Our paper describes the final results of numerical simulation of a micromechanical process sequence of the atomic force microscopy (AFM) sensors. They were obtained using the virtual wafer fab (VWF) software, which is used in the Institute of Electron Technology (IET). The technology mentioned above is used for fabrication of the AFM cantilevers, which has been designed for measurement and characterization of the surface roughness, the texturing, the grain size and the hardness. The simulation are very useful in manufacturing other microcantilever sensors.
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On possibility to extend the operation temperature range of SOI sensors with polysilicon piezoresistors
Abstract
The aim of this work was to study the possibilities of developing mechanical sensors with poly-Si piezoresistors on insulating substrate for operation in different temperature ranges (low, elevated and high temperatures). Laser recrys- tallization is used as a technological tool to adjust the elec- trical and piezoresistive parameters of the polysilicon layer. For this purpose a set of studies including numerical simula- tion and experimental work has been carried out. The main three directions of the studies are considered: problems of thermal stabilization of the pressure sensor performance at elevated and high temperatures; problem of sensor operation at cryogenic temperatures; development of a multifunctional pressure-temperature sensor.
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Grain boundary effect on the anisotropy piezoresistance of laser-recrystallized polysilicon layers in SOI-structures
Abstract
A physical model of grain boundary in uence on the piezoresistive effect of p-type conductivity of polysili- con layers in SOI-structures is developed. Software calculat- ing piezoresistive properties of boron-doped p-type polysilicon layers has been developed. These properties may be calcu- lated over wide concentration and temperature ranges with anisotropy taken into account and with the average grain size as a parameter. The potential barrier regions around the grain boundaries in uence the deformation changes of anisotropy resistance in the fine-grained non-recrystallized SOI-structures doped with boron up to 3*1019cm-3
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Fabrication and properties of the field emission array with self-alignment gate electrode
Abstract
A new method for the fabrication of field emis- sion arrays (FEA) based on bulk/surface silicon micromachin- ing and diamond-like-carbon (DLC) coating was developed. A matrix of self-aligned electron field emitters is formed in sil- icon by mean anisotropic etching in alkali solution of the front silicon film through micro holes opened in silicon oxide layer. The field emission of the fabricated emitter tips is enhanced by a diamond-like-carbon film formed by chemical vapor de- position on the microtips. Back side contacts are formed by metal patterning. Detailed Raman, Auger and TEM investi- gations of the deposited DLC films (nanocrystalline diamond smaller than 10 nm) will be presented. In this paper we dis- cuss the problems related to the development of field emission arrays technology. We also demonstrate examples of devices fabricated according to those technologies.
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Adsorption properties of porous silicon
Abstract
Porous silicon shows some interesting features for micromechanical applications. Some applications make use of its high surface-to-volume ratio. A capacitive gas or humidity sensor using the adsorption of gases on the porous surface can be easily fabricated. However an opportunity for more sensitive device is given by micromechanical structure. In this paper we report on the piezoresistive cantilever beam structure with porous silicon adsorbing spot as a gas sensor.
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An impact of physical phenomena on admittances of partially-depleted SOI MOSFETs
Abstract
An in uence of the selected physical phenom- ena: impact ionization in silicon and time variation of inter- nal electric field distribution in partially-depleted (PD) SOI MOSFETs on several C-V characteristics of these devices is presented. The role of avalanche multiplication in the so- called
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A model of partially-depleted SOI MOSFETs in the subthreshold range
Abstract
A steady-state model of partially-depleted (PD) SOI MOSFETs I-V characteristics in subthreshold range is presented. Phenomena, which must be accounted for in cur- rent continuity equation, which is a key equation of the PD SOI MOSFETs model are summarized. A model of diffusion- based conduction in a weakly-inverted channel is described. This model takes into account channel length modulation, drift of carriers in the
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Comparison of gate leakage current components in metal-insulator-semiconductor structures with high-k gate dielectrics
Abstract
Numerical simulations of the gate leakage current in metal-insulator-semiconductor (MIS) structures based on the transfer matrix approach were carried out. They show contribution of different components of this current in MIS structures with best known high-k dielectrics such as Ta 2 O 5 and TiO 2 . The comparison of the gate leakage current in MIS structures with SiO 2 layer as well Ta 2 O 5 and TiO 2 layers is presented as well. Additionally, the minimum Si electron affinity to a gate dielectric which allows to preserve given level of the gate leakage current is proposed.
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Reliability of MIS transistors with plasma deposited Al2O3 gate dielectric film
Abstract
The paper presents the parameters of MIS tran- sistors with plasma deposited thin film aluminum oxide gate insulator. Al2O3 films were synthesized by means of the low- energy, low-temperature reactive pulse plasma (RPP) method. Investigated transistors, with channel width to length (W/L) ratios of 200/10 [ mm/ mm] and 200/20 [ mm/ mm] were manu- factured in a standard microelectronic technological labora- tory. In order to determine the most important parameters of produced devices there were measured their electrical charac- teristics. The distribution of the threshold voltage values was studied on a representative set of over two hundred structures
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Metastability problems in amorphous silicon
Abstract
The results of study of the in uence of boron and phosphorous doping and hydrogen content on transport prop- erties and thermally induced metastability of LPCVD a-Si are reported. The thermally induced metastability has been observed in both unhydrogenated and hydrogenated P-doped a-Si films. Metastability is a barrier for wide application of a-Si such solar cells. In this paper we report our studies on the effect of thermally induced metastability in LPCVD a-Si as a function of implanted boron and phosphorous concentration. We have investigated films unhydrogenated and hydrogenated by ion implantation. The results are qualitatively agreed with bond breaking model.
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Implementation of the block cipher Rijndael using Altera FPGA
Abstract
A short description of the block cipher Rijndael is presented. Hardware implementation by means of the FPGA (field programmable gate array) technology is evaluated. Im- plementation results compared with other hardware imple- mentations are summarized.
