Reliability of deep submicron MOSFETs

Abstract

In this work, a review of the reliability of n- and p-channel Si and SOI MOSFETs as a function of gate length and temperature is given. The main hot carrier effects and degradations are compared for bulk and SOI devices in a wide range of gate length, down to deep submicron. The worst case aging, device lifetime and maximum drain bias that can be applied are addressed. The physical mechanisms and the emergence of new phenomena at the origin of the degradation are studied for advanced MOS transistors. The impact of the substrate bias is also outlined.