Implementation of the block cipher Rijndael using Altera FPGA

Authors

  • Piotr Mroczkowski

DOI:

https://doi.org/10.26636/jtit.2001.1.35

Keywords:

block cipher, Rijndael, Altera FPGA

Abstract

A short description of the block cipher Rijndael is presented. Hardware implementation by means of the FPGA (field programmable gate array) technology is evaluated. Im- plementation results compared with other hardware imple- mentations are summarized.

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Published

2001-03-30

Issue

No. 1 (2001)

Section

ARTICLES FROM THIS ISSUE

License

Copyright (c) 2001 Journal of Telecommunications and Information Technology

Creative Commons License

This work is licensed under a Creative Commons Attribution 4.0 International License.

How to Cite

[1]
P. Mroczkowski, “Implementation of the block cipher Rijndael using Altera FPGA”, JTIT, vol. 3, no. 1, pp. 80–86, Mar. 2001, doi: 10.26636/jtit.2001.1.35.