TSSOI as an efficient tool for diagnostics of SOI technology in Institute of Electron Technology
DOI:
https://doi.org/10.26636/jtit.2005.1.287Keywords:
SOI CMOS technology, pixel detector, test structureAbstract
This paper reports a test structure for characterization of a new technology combining a standard CMOS process with pixel detector manufacturing technique. These processes are combined on a single thick-film SOI wafer. Preliminary results of the measurements performed on both MOS SOI transistors and dedicated SOI test structures are described in detail.
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Copyright (c) 2005 Journal of Telecommunications and Information Technology
This work is licensed under a Creative Commons Attribution 4.0 International License.
