TSSOI as an efficient tool for diagnostics of SOI technology in Institute of Electron Technology

Authors

  • Mateusz Barański
  • Krzysztof Domański
  • Piotr Grabiec
  • Mirosław Grodner
  • Bohdan Jaroszewicz
  • Andrzej Kociubiński
  • Wojciech Kucewicz
  • Krzysztof Kucharski
  • Jacek Marczewski
  • Halina Niemiec
  • Maria Sapor
  • Daniel Tomaszewski

DOI:

https://doi.org/10.26636/jtit.2005.1.287

Keywords:

SOI CMOS technology, pixel detector, test structure

Abstract

This paper reports a test structure for characterization of a new technology combining a standard CMOS process with pixel detector manufacturing technique. These processes are combined on a single thick-film SOI wafer. Preliminary results of the measurements performed on both MOS SOI transistors and dedicated SOI test structures are described in detail.

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Published

2005-03-30

Issue

No. 1 (2005)

Section

ARTICLES FROM THIS ISSUE

License

Copyright (c) 2005 Journal of Telecommunications and Information Technology

Creative Commons License

This work is licensed under a Creative Commons Attribution 4.0 International License.

How to Cite

[1]
M. Barański, “TSSOI as an efficient tool for diagnostics of SOI technology in Institute of Electron Technology”, JTIT, vol. 19, no. 1, pp. 85–93, Mar. 2005, doi: 10.26636/jtit.2005.1.287.

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