SOI Technology: An Opportunity for RF Designers?

Authors

  • Jean-Pierre Raskin

DOI:

https://doi.org/10.26636/jtit.2009.4.954

Keywords:

crosstalk, high resistivity silicon substrate, MOSFET, nonlinearities, silicon-on-insulator, wideband characterization

Abstract

This last decade silicon-on-insulator (SOI) MOS-FET technology has demonstrated its potentialities for high frequency (reaching cutoff frequencies close to 500 GHz forn-MOSFETs) and for harsh environments (high temperature,radiation) commercial applications. For RF and system-on-chip applications, SOI also presents the major advantage of providing high resistivity substrate capabilities, leading to substantially reduced substrate losses. Substrate resistivity values higher than 1 kΩΩΩcm can easily be achieved and high resistivity silicon (HRS) is commonly foreseen as a promising substrate for radio frequency integrated circuits (RFIC) and mixed signal applications. In this paper, based on several experimenta land simulation results the interest, limitations but also possible future improvements of the SOI MOS technology are presented.

Downloads

Download data is not yet available.

Downloads

Published

2009-12-30

Issue

Section

ARTICLES FROM THIS ISSUE

How to Cite

[1]
J.-P. Raskin, “SOI Technology: An Opportunity for RF Designers?”, JTIT, vol. 38, no. 4, pp. 3–17, Dec. 2009, doi: 10.26636/jtit.2009.4.954.