Direct extraction techniques of microwave small-signal model and technological parameters for sub-quarter micron SOI MOSFETs
DOI:
https://doi.org/10.26636/jtit.2000.3-4.27Keywords:
microelectronics, microwave devices, SOI MOSFETAbstract
Original extraction techniques of microwave small-signal model and technological parameters for SOI MOSFETs are presented. The characterization method combines careful design of probing and calibration structures, rigorous in situ calibration and a powerful direct extraction method. The proposed characterization procedure is directly based on the physical meaning of each small-signal model element. Knowing the qualitative small-signal behavior of each model parameter versus bias conditions, the high frequency equivalent circuit can be simplified for extraction purposes. Biasing MOSFETs under depletion, strong inversion and saturation conditions, certain technological parameters and microwave small-signal elements can be extracted directly from the measured S-parameters. These new extraction techniques allow us to understand deeply the behavior of the sub-quarter micron SOI MOSFETs in microwave domain and to control their fabrication process.
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[1] C. Raynaud, O. Faynot, J.-L. Pelloie, S. Deleonibus, D. Vanhoenacker, R. Gillon, J. Sevenhans, E. Compagne, G. Fletcher, and E. Mackowiak, "Fully-depleted 0.25 m SOI devices for low power RF mixed analog-digital circuits", in Proc. 1998 IEEE Int. SOI Conf., Oct. 1998, pp. 67-68.
View in Google Scholar
[2] D. D. Rathman, J. A. Burns, R. Berger, A. M. Soares, and R. H. Mathews, "High frequency performance of a fully depleted 0.25 m SOI CMOS technology", in 1999 IEEE MTT Symp. Dig., June 1999, pp. 577-580.
View in Google Scholar
[3] J. N. Burghartz, M. Hargrove, C. Webster, R. Groves, M. Keene, K. Jenkins, D. Edelstein, R. Logan, and E. Nowak, "RF potential of a 0.18 m CMOS logic technology", in 1999 IEEE MTT Symp. Dig., June 1999.
View in Google Scholar
[4] C. Raynaud, O. Faynot, J.-L. Pelloie, F. Martin, S. Tedesco, J. Cluzel, A. Grouillet, B. Dal'zotto, and D. Vanhoenacker, "Stability of fully depleted SOI technology into 0.13 m 1.2 V 1 V CMOS generation", in Proc. 1999 IEEE Int. SOI Conf., Oct. 1998, pp. 86-87.
View in Google Scholar
[5] J.-P. Colinge, Silicon-on-Insulator Technology: Material to VLSI. Boston - Dordrecht - London: Kluwer Academic Publishers, 1991.
View in Google Scholar
[6] M. Goffioul, J.-P. Raskin, and D. Vanhoenacker, "Microwave integrated CMOS oscillators on silicon-on-insulator substrate", accepted for publication in 30th Eur. Microw. Conf. Proc. EuMC'2000, Paris, France, Oct. 2-6, 2000.
View in Google Scholar
[7] R. Gillon, J.-P. Raskin, D. Vanhoenacker, and J.P. Colinge, "Determining the reference impedance of on-wafer TLR calibrations on lossy substrates", in 26th Eur. Microw. Conf. Proc. EuMC'96, Prague, Czech Republic, Sept. 9-12, 1996, pp. 170-173.
View in Google Scholar
[8] J.-P. Raskin, "Modeling, characterization and optimization of MOSFET's and passive elements for the synthesis of SOI MMIC's", Ph.D. thesis, Dec. 1997.
View in Google Scholar
[9] J.-P. Raskin, G. Dambrine, and D. Vanhoenacker, "Accurate SOI MOSFET characterization at microwave frequencies", Electron Technol., vol. 32, no. 1-2, pp. 72-80, 1999.
View in Google Scholar
[10] G. Dambrine, A. Cappy, F. Heliodore, and E. Playez, "A new method for determining the FET small-signal equivalent circuit", IEEE Trans. Microw. Theory Techn., vol. MTT-36, no. 7, pp. 1151-1159, 1988.
View in Google Scholar
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