JURCZAK, Małgorzata et al. Challenges in scaling of CMOS devices towards 65 nm node. Journal of Telecommunications and Information Technology, [S. l.], v. 19, n. 1, p. 3–6, 2005. DOI: 10.26636/jtit.2005.1.299. Disponível em: https://jtit.pl/jtit/article/view/299. Acesso em: 12 dec. 2024.